CompSOC Lab- Predictable & Composable Embedded Systems

Applications in a composable system are completely isolated (in terms of space, time, and energy) and cannot affect each other’s behaviours, enabling them to be independently designed, debugged, verified, deployed, and updated. Predictable systems, on the other hand, provide lower bounds on performance, allowing applications to be verified using formal performance analysis. This is essential for real-time and safety-critical systems.

CompSOC is an architecture template for predictable and composable systems, and is based on well-defined concepts, in particular:

• the use of budgets to reserve resources thus creating virtual resources
• predictable resources and arbitration to implement budgets
• composable resources and arbitration to remove any interference between applications
• scalability by decoupling resources and their arbitration

For efficiency, the following are additionally desirable: finite schedulng interval, efficient arbitration, efficient resource sharing.
These concepts combine into the concept of a Virtual Execution Platform.

CompSOC concepts have been proven in many demonstrators on FPGA, multi-FPGA, and in ASIC with applications such as multimedia, embedded control, robotics operating system (ROS2). We have performed seminal research on predictable Networks on Chip (Aethereal, Aelite), predictable DRAM controllers (Predator, DRAMPower).

More information can be found here.