Roel Jordans is an Assistant Professor in the Electronic Systems group of the Electrical Engineering Department at Eindhoven University of Technology (TU/e). His research interests include developing hardware architectures for reliable, high-performance systems and compilation techniques for and design automation applied to application-specific processors. Jordans supports processor architecture research teams with developing the compilers for their architectures. He provides workshops and direct support, both for industrial partners as for TU/e's own coarse-grain reconfigurable architecture (CGRA) and single instruction, multiple data (SIMD) architectures. Jordans worked on the STARS-JITC RP project, focusing on just-in-time compilation for reconfigurable platforms. He is currently also active in the NCLE and Auger Radio Upgrade projects at the Radboud RadioLab, which is part of their Astrophysics department. In Ireland, Jordans was part of a research collaboration through a HiPEAC Collaboration grant, where he investigated the possibilities of high-level software pipelining in LLVM. For his PhD research, Jordans worked on automatic very long instruction word (VLIW) data-path synthesis for ASIPs, trying to find the optimal issue width and instruction set of a VLIW processor based on the target application. He also explored a VLIW-based processor architecture based on these estimates, combining the strengths of the LLVM compiler framework with custom exploration strategies.
Roel Jordans obtained his MSc degree in Electrical and Electronic Engineering from Eindhoven University of Technology (TU/e) in 2009. He also obtained his PhD from TU/e in 2015, in the same field. He worked as a postdoc at TU/e for 3 years before he took the position of Assistant Professor in the Electronic Systems group in the Electrical Engineering department. Jordans has also done projects at Philips as a student and has worked as a visiting research scholar at Movidius (Ireland). He is currently active as DSP Architect at the Radboud RadioLab, where he started in 2017.
Determining the necessity of fault tolerance techniques in FPGA devices for space missionsMicroprocessors and Microsystems (2018)
A generic methodology to compute design sensitivity to SEU in SRAM-Based FPGA21st Euromicro Conference on Digital System Design, DSD 2018 (2018)
A review of near-memory computing architectures21st Euromicro Conference on Digital System Design, DSD 2018 (2018)
Fast and portable vector dsp simulation through automatic vectorization21st International Workshop on Software and Compilers for Embedded Systems, SCOPES 2018 (2018)
Optimization through recomputation in the polyhedral model8th International Workshop on Polyhedral Compilation Techniques (2018)
- Parallelization, compilers and platforms
- Advanced digital circuit design
- Ontwerp en implementatie van instrumentatie voor (radio) astronomie waaronder zowel de hardware implementatie als de verwerking van, Radboud Radio Lab, Radboud Universiteit Nijmegen