Design of a 65nm 12b SAR ADC at CERN (Geneva, Switzerland)

Context: The Medipix4 project

The Medipix4 project aims to develop the next generation of pixel detector readout chips aimed at spectroscopic X-ray imaging (e.g. for medicine) and single particle detection and tracking (e.g. for terrestrial and space-based dosimetry). These chips are composed of a 2D array of detection channels each of which is a complicated mixed-mode circuit and each channel is connected to a corresponding sensor channel using bump bonds. In the previous generation of ASIC’s (in 250nm and 130nm CMOS) the chips could be abutted on 3 sides and therefore larger detection areas of up to 2 x n chips could be produced. The I/O of the chips was on one side only. The Medipix4 project will use 65nm CMOS and aims to develop readout ASIC’s which can be abutted on all 4 sides. Through Silicon Vias (TSV’s) will be used for I/O. A well-established and experienced design team at CERN seeks a highly qualified trainee or trainees as described below. 

Final Master project (9 months):

The transition to 65nm is challenging for both analog and digital circuitry. On the analog side the reduced power supply may imply the invention and/or adoption of novel architectures which permit good sensitivity while maintaining a high dynamic range. A particular constraint in the design of digital blocks for such systems is to maintain reasonable speed while keeping power consumption to an absolute minimum. This may involve the development of new library blocks adapted to this particular application and will certainly impose strict requirements on the digital solutions and architectures chosen. One of the required mixed-mode blocks is a compact 10-12 bits monitoring ADC with a low speed conversion speed (<10 kSPS) used to monitor on-chip DC bias analog signals. It is expected that the outcome of this work will be the topic of a Master’s thesis. 

Application details

Interested master students should contact immediately prof. Eugenio Cantatore (, enclosing a CV and an overview of their exams, with marks. If their curriculum will be considered suitable to this very challenging project, they will apply to the CERN technical student program: Deadline for application is October 16th 2017. Please check eligibility conditions.

If the candidate will be accepted in the technical student program, he/she will work at the described project for at least 9 months. After a short introduction time in Eindhoven, the project work will be performed at CERN, Geneva, starting in January/February 2018, and will be financially supported by the technical student grant. The project will be supervised by prof. Cantatore and by prof. Campbell, CERN.