Quantizer and D/A converter designs for a low-power sigma-delta A/D converter for hearing aids

Quantizer and D/A converter designs for a low-power sigma-delta A/D converter for hearing aids

Power efficiency is of great importance in battery operated applications like a hearing aid. The total power budget of the receiver in a hearing aid is about 1 mW and the A/D converter in the receiver can only consume a fraction of that. Successive approximation (SAR) A/D converters are known for their extremely good power efficiency but they require an anti-alias filter, to suppress signals that are present in close neighborhood of the sampling frequency. This anti-alias filter can be quite power hungry and degrade the power efficiency of the total system. Continuous-time sigma-delta A/D converters have lower power efficiency compared to SAR ADCs, but have inherent anti-alias filtering functionality which eliminates the need for an additional anti-alias filter. Therefore, a continuous-time sigma-delta A/D converter can be an attractive solution for low-power hearing aids.

This M.Sc. assignment focuses on the design and implementation of a low-power sigma-delta A/D converter for hearing aid applications. The target specifications for the sigma-delta A/D converter for hearing aids are:

  • Signal bandwidth = 1 MHz
  • Sampling frequency = 16 MHz / 32 MHz
  • Oversampling factor = 8 x / 16 x
  • Resolution (DR) = 60dB
  • Third-order intermodulation distortion ~ 50dB
  • Power consumption ~ 100uW
  • Anti-alias suppression > 60dB


The sigma-delta A/D converter is a key system in many application areas like cellular phones, radio receivers, audio codecs, sensor interfaces, hearing aids, etc. A sigma-delta modulator is a non-linear feedback system and consists of different circuits like amplifiers, analog and digital filters, a quantizer and a DAC. This assignment will give the students an opportunity to learn about sigma-delta modulators, different circuit designs, as well as the aspects of a feedback system, like stability, time and frequency responses, root loci, etc. The students will work with the Cadence tools and they will design circuits in an advanced CMOS technology. Some experience with Cadence and basic understanding of CMOS circuit design is required. This project is a joint cooperation with NXP Semiconductors in Eindhoven.

At the start of the assignment you will do a literature and architectural study to the low-power sigma-delta ADC and building blocks. After this study, the design of the sigma-delta ADC will start and and the main challenges of this project are the designs of an ultra low-power quantizer and D/A converter for the sigma-delta converter. The other functional blocks of the system, like the amplifier and loop filter will be done by a student in another assignment. After the designs of the functional blocks are finalized they will be integrated in the total system, and the layout of the different blocks will be made. The organization of this project is as follows:

TIME PLANNING
Literature and architectural study1 month
Circuit design (quantizer, DAC)4 months
System integratio1 month
Layout2 months
Documentation1 month
Total9 months

If you are interested in this challenge, please contact Prof.dr.ir. Lucien Breems.