A configurable and low-power mixed signal SoC for portable ECG monitoring applications


Kim, H., Kim, S., van Helleputte, N., Artes, A., Konijnenburg, M., Huisken, J., Van Hoof, C.A. & Yazicioglu, R.F. (2014). A configurable and low-power mixed signal SoC for portable ECG monitoring applications. IEEE Transactions on Biomedical Circuits and Systems, 8(2):6544283 In Scopus Cited 53 times.

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This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-to-digital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 μ m CMOS process and consumes 32 μ W from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly.