A 3.72μW ultra-low power digital baseband for wake-up radios


Zhang, Y., Chen, Sijie, Kiyani, N.F., Dolmans, G., Huisken, J., Büsze, B., Harpe, P.J.A., Meijs, van der, N.P. & Groot, de, H.W.H. (2011). A 3.72μW ultra-low power digital baseband for wake-up radios. Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan (pp. 1-4). Piscataway: Institute of Electrical and Electronics Engineers (IEEE). In Scopus Cited 13 times.

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In order to minimize power consumption without sacrificing much latency performance, wake-up radios are employed to assist the main radio for low power channel monitoring. This paper presents the design and implementation of an ultra-low power digital baseband (DBB) circuit for a wake-up radio. In a 90nm CMOS process, the circuit running at a 800kHz clock consumes 3.72µW with a standard 1.2V supply voltage, and achieves very good packet detection performance. The circuit is fully functional at 0.6V supply consuming 0.9µW.