Research Profile
Important for our research are data converters based on sigma-delta modulation (SDM). We are working on the improvement of smart SDMs by applying our new limit-cycle theory to optimally correct their loop filters, their feedback DA converters and for stability estimation. We found new incremental methods, including a new decoding technique for highly accurate DC sensing with SDMs. In parallel we do research on ultra-high-speed SDM AD converters, using novel architectures that significantly relax the design requirements for meta-stability errors, for excess loop delay and for DAC jitter.
We derive and implement very high-speed high-resolution AD converter architectures, using a novel parallel sampling technique, exploiting information about the input signal distribution function.
Meet some of our Researchers
Project Related Publications
Our most recent peer reviewed publications
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The Impact of Transceiver Nonlinearity in PMCW Radar using Polyphase coded Sequences
(2023) -
Qualitative Assessment Guidelines for MSc Graduation Projects in Electrical Engineering
(2023) -
RF and mm-Wave Systems and Circuits for Communications and Sensing
(2023) -
A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS
IEEE Journal of Solid-State Circuits (2022) -
Mapping Error Reduction Methods for Polyphase Codes Generated by Quadrature Architectures
(2022)
Contact
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Visiting address
Groene Loper 19Flux5612 AP EindhovenNetherlands -
Visiting address
Groene Loper 19Flux5612 AP EindhovenNetherlands -
Postal address
P.O. Box 513Department of Electrical Engineering5600 MB EindhovenNetherlands -
SecretarySecretariaatMsM.E@ tue.nl